Scientists discover a way to ‘grow’ sub-nanometer sized transistors

A research team led by director Jo Moon-Ho of the Center for Van der Waals Quantum Solids within the Institute for Basic Science (IBS) has implemented a new method to achieve epitaxial growth of 1D metallic materials with widths of less than 1 nm . The group applied this process to develop a new structure for 2D semiconductor logic circuits. Notably, they used 1D metals as a gate electrode of the ultra-miniature transistor.

This research appears in Nanotechnology of nature.

Integrated devices based on two-dimensional (2D) semiconductors, which exhibit excellent properties even at the ultimate limit of material thickness down to the atomic scale, are a major focus of basic and applied research worldwide. However, realizing such ultra-miniature transistor devices that can control the movement of electrons within a few nanometers, let alone developing the manufacturing process for these integrated circuits, has faced significant technical challenges.

The degree of integration in semiconductor devices is determined by the width and control efficiency of the gate electrode, which controls the flow of electrons in the transistor. In conventional semiconductor manufacturing processes, reducing the gate length below a few nanometers is impossible due to lithography resolution limitations.

To solve this technical problem, the research team used the fact that the mirror twin boundary (MTB) of molybdenum disulfide (MoS₂), a 2D semiconductor, is a 1D metal with a width of only 0.4 nm. They used this as a gate electrode to overcome the limitations of the lithography process.

In this study, the metallic 1D MTB phase was achieved by controlling the crystal structure of the existing 2D semiconductor at the atomic level, transforming it into a 1D MTB. This represents an important advance not only for next-generation semiconductor technology, but also for basic materials science, as it demonstrates the large-area synthesis of new material phases through artificial control of crystal structures.

The International Roadmap for Devices and Systems (IRDS) by IEEE predicts that semiconductor node technology will reach about 0.5 nm by 2037, with transistor gate lengths of 12 nm. The research team demonstrated that the channel width modulated by the electric field applied by the MTB 1D gate can be as small as 3.9 nm, significantly exceeding the futuristic prediction.

The MTB-based 1D transistor developed by the research team also offers advantages in circuit performance. Technologies such as FinFET or Gate-All-Around, adopted for the miniaturization of silicon semiconductor devices, suffer from parasitic capacitance due to their complex device structures, leading to instability in highly integrated circuits. In contrast, the 1D MTB-based transistor can minimize parasitic capacitance due to its simple structure and extremely narrow gate width.

Director Jo Moon-Ho commented: “The 1D metal phase achieved through epitaxial growth is a new material process that can be applied to ultra-miniature semiconductor processes. It is expected to become a key technology for the development of various low-power and high-performance high. electronic devices in the future”.